Dr. Yufei Ma has conducted extensive and in-depth research in the fields of AI hardware acceleration, digital VLSI circuit design, and AI algorithm and hardware co-design. His research particularly focuses on the efficient hardware deployment and acceleration of deep learning algorithms. His related achievements have been published in top-tier academic journals in the field of integrated circuit design, such as IEEE TCAS-I, TCAD, TVLSI, and JETCAS, as well as flagship conferences in the field such as ISSCC, DAC, ICCAD, FPGA, ISCAS, etc. His academic contributions have been recognized by international peers, with over 800 citations in SCI and over 1900 citations on Google Scholar. He serves as a TPC member for DAC and reviewer for many high-level journals, including IEEE JSSC, TCAS-I/II, TVLSI, TC, and so on.
